These pages 1-7 include example projects for experimentation with CBII, composed in Altium Designer 10 and/or Xilinx ISE12. Included are ported projects from the original CBI and peripherals, some new projects created to test CBII's capabilities and other general projects ported for experimental purposes. Please note these projects are works in progress and may have errors. If you're in a position to solve any bugs I would be very happy to include your solutions in these pages.
Note: .UCF and .BIT are included in the .ZIP of the downloadable AD project along with all the files required to compile using Altium Designer, as well as any source files used in creating/porting the project. All files required for porting to a different environment such as Xilinx ISE are supplied in the .ZIP.
All games are playable and interface to the Apple II keyboard. Keys are: A (up), Z (down), <-- (left), --> (right), X (jump/fire), C (coin), 1 (1 Player Start).
This single channel mono mocking board is configured to use a real R6522 VIA located in the ZIF48 socket confirming the circuit is working correctly and software is able to access the card. Included are also soft instruments to monitor specific addresses.
Various demo and test FPGA projects for Carte Blanche II
This is a fully functional Sweet Micro System's Mockingboard revA Apple II sound card. Based on cores written by MikeJ and consisting of M6522 VIAs, YM2419s in place of the AY-3-8910s and Delta Sigma DAC's for each of the left/right stereo channels.
Ported from Mark McDougall's PACE dev, Arnim Läuger's Colecovision console project is ideal for researching both SN76489 and TMS9918A interfaced and operating. Cartridges can be changed by re-directing the brams target file to a different image.
This is Mike Field's SDRAM memory controller and memory testing procedures. The SDRAM is subject to a series of patterns and marching tests at 100MHz. The status of the test is viewed via soft instruments. On any memory error, the LED will light.
This Apple II/II+ Slot 0 16K RAM card is from Alex Freed's "Apple II in an FPGA" design, similar to Don Burtis's original Microsoft 16K RAM card. It includes indicators for Read/Write and bank access and sets the precedence for larger memory cards.
This generic W65C816 14MHz accelerator card (currently 1MHz) is a true plugin replacement processor board with onboard cache (not enabled). The photo shows unnecessary removal of the motherboard CPU purely to demonstrate CBII is driving the system.
This WIP but functional Super Serial Card II uses a R6551 core with the FT2232 USB UART for a USB connection to a PC. It is implemented in mostly async logic and accelerated 16x with a maximum of 115200 baud. Settings are 15B=115200, 14B=57600 etc.