Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 

 
Software Version and Target Device
Product Version: ISE:12.1 (WebPack) - M.53d Target Family: Spartan3A and Spartan3AN
OS Platform: NT Target Device: xc3s400an
Project ID (random number) 684acf2150724198a130877b888bb684.d961292287f649e5924667b4328fdd68.4 Target Package: fgg400
Registration ID 176036481_0_0_631 Target Speed: -4
Date Generated 2015-07-11T18:40:53 Tool Flow CommandLine
 
User Environment
OS Name Microsoft Windows XP Professional OS Release Service Pack 3 (build 2600)
CPU Name Intel(R) Xeon(R) CPU W3520 @ 2.67GHz CPU Speed 2666 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
  MiscellaneousStatistics
  • AGG_BONDED_IO=86
  • AGG_IO=86
  • AGG_SLICE=3582
  • NUM_4_INPUT_LUT=6502
  • NUM_BONDED_IBUF=49
  • NUM_BONDED_IOB=37
  • NUM_BUFGMUX=7
  • NUM_CARRY_SKIP=3
  • NUM_CYMUX=974
  • NUM_DCM=2
  • NUM_DP_RAM=128
  • NUM_IOB_FF=9
  • NUM_LUT_RT=342
  • NUM_MULT18X18SIO=2
  • NUM_RAMB16BWE=19
  • NUM_SHIFT=20
  • NUM_SLICEL=3472
  • NUM_SLICEM=110
  • NUM_SLICE_FF=2158
  • NUM_XOR=851
NetStatistics
  • NumNets_Active=7449
  • NumNets_Gnd=1
  • NumNets_Vcc=1
  • NumNodesOfType_Active_BRAMADDR=226
  • NumNodesOfType_Active_BRAMDUMMY=300
  • NumNodesOfType_Active_CLKPIN=1462
  • NumNodesOfType_Active_CNTRLPIN=2145
  • NumNodesOfType_Active_DOUBLE=20607
  • NumNodesOfType_Active_DUMMY=20659
  • NumNodesOfType_Active_DUMMYBANK=236
  • NumNodesOfType_Active_DUMMYESC=24
  • NumNodesOfType_Active_GLOBAL=321
  • NumNodesOfType_Active_HFULLHEX=362
  • NumNodesOfType_Active_HLONG=80
  • NumNodesOfType_Active_HUNIHEX=2409
  • NumNodesOfType_Active_INPUT=23096
  • NumNodesOfType_Active_IOBOUTPUT=32
  • NumNodesOfType_Active_OMUX=7047
  • NumNodesOfType_Active_OUTPUT=7326
  • NumNodesOfType_Active_PREBXBY=5326
  • NumNodesOfType_Active_VFULLHEX=1281
  • NumNodesOfType_Active_VLONG=247
  • NumNodesOfType_Active_VUNIHEX=1830
  • NumNodesOfType_Gnd_BRAMADDR=11
  • NumNodesOfType_Gnd_BRAMDUMMY=115
  • NumNodesOfType_Gnd_CLKPIN=4
  • NumNodesOfType_Gnd_CNTRLPIN=4
  • NumNodesOfType_Gnd_DOUBLE=104
  • NumNodesOfType_Gnd_DUMMY=188
  • NumNodesOfType_Gnd_DUMMYBANK=21
  • NumNodesOfType_Gnd_HFULLHEX=2
  • NumNodesOfType_Gnd_INPUT=361
  • NumNodesOfType_Gnd_OMUX=102
  • NumNodesOfType_Gnd_OUTPUT=71
  • NumNodesOfType_Gnd_PREBXBY=60
  • NumNodesOfType_Gnd_VFULLHEX=17
  • NumNodesOfType_Gnd_VLONG=1
  • NumNodesOfType_Gnd_VUNIHEX=2
  • NumNodesOfType_Vcc_BRAMDUMMY=83
  • NumNodesOfType_Vcc_CNTRLPIN=8
  • NumNodesOfType_Vcc_DUMMY=20
  • NumNodesOfType_Vcc_INPUT=147
  • NumNodesOfType_Vcc_PREBXBY=40
  • NumNodesOfType_Vcc_VCCOUT=134
SiteStatistics
  • IBUF-DIFFMLR=12
  • IBUF-DIFFMTB=12
  • IBUF-DIFFSLR=11
  • IBUF-DIFFSTB=12
  • IOB-DIFFMLR=3
  • IOB-DIFFMTB=15
  • IOB-DIFFSLR=4
  • IOB-DIFFSTB=15
  • SLICEL-SLICEM=1681
SiteSummary
  • BUFGMUX=7
  • BUFGMUX_GCLKMUX=7
  • BUFGMUX_GCLK_BUFFER=7
  • DCM=2
  • DCM_DCM=2
  • IBUF=49
  • IBUF_DELAY_ADJ_BBOX=49
  • IBUF_IFF1=9
  • IBUF_INBUF=49
  • IBUF_PAD=49
  • IOB=37
  • IOB_OUTBUF=37
  • IOB_PAD=37
  • MULT18X18SIO=2
  • MULT18X18SIO_MULT18X18SIO=2
  • RAMB16BWE=19
  • RAMB16BWE_RAMB16BWE=19
  • SLICEL=3472
  • SLICEL_C1VDD=120
  • SLICEL_C2VDD=111
  • SLICEL_CYMUXF=511
  • SLICEL_CYMUXG=463
  • SLICEL_F=3188
  • SLICEL_F5MUX=513
  • SLICEL_F6MUX=18
  • SLICEL_FFX=1169
  • SLICEL_FFY=937
  • SLICEL_G=3102
  • SLICEL_GNDF=218
  • SLICEL_GNDG=188
  • SLICEL_VDDG=3
  • SLICEL_XORF=433
  • SLICEL_XORG=418
  • SLICEM=110
  • SLICEM_F=102
  • SLICEM_F5MUX=32
  • SLICEM_F6MUX=32
  • SLICEM_FFX=6
  • SLICEM_FFY=46
  • SLICEM_G=110
  • SLICEM_WSGEN=78
 
Configuration Data
BUFGMUX
  • S=[S_INV:7] [S:0]
BUFGMUX_GCLKMUX
  • DISABLE_ATTR=[LOW:7]
  • S=[S_INV:7] [S:0]
DCM
  • PSCLK=[PSCLK_INV:0] [PSCLK:2]
  • PSEN=[PSEN_INV:0] [PSEN:2]
  • PSINCDEC=[PSINCDEC_INV:0] [PSINCDEC:2]
  • RST=[RST:1] [RST_INV:1]
DCM_DCM
  • CLKDV_DIVIDE=[2:1] [16:1]
  • CLKOUT_PHASE_SHIFT=[NONE:2]
  • CLK_FEEDBACK=[1X:2]
  • DESKEW_ADJUST=[9:2]
  • DFS_FREQUENCY_MODE=[LOW:2]
  • DLL_FREQUENCY_MODE=[LOW:2]
  • DUTY_CYCLE_CORRECTION=[TRUE:2]
  • FACTORY_JF1=[0XC0:2]
  • FACTORY_JF2=[0X80:2]
  • PSCLK=[PSCLK_INV:0] [PSCLK:2]
  • PSEN=[PSEN_INV:0] [PSEN:2]
  • PSINCDEC=[PSINCDEC_INV:0] [PSINCDEC:2]
  • RST=[RST:1] [RST_INV:1]
IBUF
  • ICE=[ICE:8] [ICE_INV:0]
  • ICLK1=[ICLK1_INV:0] [ICLK1:9]
IBUF_DELAY_ADJ_BBOX
  • DELAY_ADJ_ATTRBOX=[FIXED:49]
  • IBUF_DELAY_VALUE=[DLY0:49]
  • IFD_DELAY_VALUE=[DLY0:40] [DLY5:9]
  • SEL_IN=[SEL_IN:49] [SEL_IN_INV:0]
IBUF_IFF1
  • CE=[CE:8] [CE_INV:0]
  • CK=[CK:9] [CK_INV:0]
  • IFF1_INIT_ATTR=[INIT0:9]
  • LATCH_OR_FF=[FF:9]
IBUF_PAD
  • IOATTRBOX=[LVTTL:49]
  • PULL=[PULLUP:1]
IOB
  • O1=[O1_INV:1] [O1:36]
IOB_OUTBUF
  • IN=[IN_INV:1] [IN:36]
  • SUSPEND=[3STATE:37]
IOB_PAD
  • DRIVEATTRBOX=[12:37]
  • IOATTRBOX=[LVTTL:37]
  • SLEW=[SLOW:37]
MULT18X18SIO
  • CEA=[CEA_INV:0] [CEA:2]
  • CEB=[CEB_INV:0] [CEB:2]
  • CEP=[CEP:2] [CEP_INV:0]
  • CLK=[CLK:2] [CLK_INV:0]
  • RSTA=[RSTA:2] [RSTA_INV:0]
  • RSTB=[RSTB:2] [RSTB_INV:0]
  • RSTP=[RSTP_INV:0] [RSTP:2]
MULT18X18SIO_MULT18X18SIO
  • AREG=[0:2]
  • BREG=[0:2]
  • B_INPUT=[DIRECT:2]
  • CEA=[CEA_INV:0] [CEA:2]
  • CEB=[CEB_INV:0] [CEB:2]
  • CEP=[CEP:2] [CEP_INV:0]
  • CLK=[CLK:2] [CLK_INV:0]
  • PREG=[0:2]
  • PREG_CLKINVERSION=[0:2]
  • RSTA=[RSTA:2] [RSTA_INV:0]
  • RSTB=[RSTB:2] [RSTB_INV:0]
  • RSTP=[RSTP_INV:0] [RSTP:2]
RAMB16BWE
  • CLKA=[CLKA_INV:0] [CLKA:19]
  • CLKB=[CLKB_INV:0] [CLKB:2]
  • ENA=[ENA_INV:0] [ENA:19]
  • ENB=[ENB_INV:0] [ENB:2]
  • SSRA=[SSRA_INV:0] [SSRA:19]
  • SSRB=[SSRB_INV:0] [SSRB:2]
  • WEA0=[WEA0:17] [WEA0_INV:2]
  • WEA1=[WEA1:17] [WEA1_INV:2]
  • WEA2=[WEA2:17] [WEA2_INV:2]
  • WEA3=[WEA3_INV:2] [WEA3:17]
  • WEB0=[WEB0:2] [WEB0_INV:17]
  • WEB1=[WEB1:2] [WEB1_INV:17]
  • WEB2=[WEB2_INV:17] [WEB2:2]
  • WEB3=[WEB3:2] [WEB3_INV:17]
RAMB16BWE_RAMB16BWE
  • CLKA=[CLKA_INV:0] [CLKA:19]
  • CLKB=[CLKB_INV:0] [CLKB:2]
  • DATA_WIDTH_A=[4:8] [9:10] [18:1]
  • DATA_WIDTH_B=[0:17] [9:1] [18:1]
  • ENA=[ENA_INV:0] [ENA:19]
  • ENB=[ENB_INV:0] [ENB:2]
  • SSRA=[SSRA_INV:0] [SSRA:19]
  • SSRB=[SSRB_INV:0] [SSRB:2]
  • WEA0=[WEA0:17] [WEA0_INV:2]
  • WEA1=[WEA1:17] [WEA1_INV:2]
  • WEA2=[WEA2:17] [WEA2_INV:2]
  • WEA3=[WEA3_INV:2] [WEA3:17]
  • WEB0=[WEB0:2] [WEB0_INV:17]
  • WEB1=[WEB1:2] [WEB1_INV:17]
  • WEB2=[WEB2_INV:17] [WEB2:2]
  • WEB3=[WEB3:2] [WEB3_INV:17]
  • WRITE_MODE_A=[WRITE_FIRST:19]
  • WRITE_MODE_B=[WRITE_FIRST:19]
SLICEL
  • BX=[BX_INV:18] [BX:943]
  • BY=[BY:451] [BY_INV:29]
  • CE=[CE:1151] [CE_INV:35]
  • CIN=[CIN_INV:0] [CIN:451]
  • CLK=[CLK:1340] [CLK_INV:10]
  • SR=[SR:806] [SR_INV:20]
SLICEL_CYMUXF
  • 0=[0:511] [0_INV:0]
  • 1=[1_INV:3] [1:508]
SLICEL_CYMUXG
  • 0=[0:460] [0_INV:0]
SLICEL_F5MUX
  • S0=[S0:513] [S0_INV:0]
SLICEL_F6MUX
  • S0=[S0:18] [S0_INV:0]
SLICEL_FFX
  • CE=[CE:992] [CE_INV:32]
  • CK=[CK:1166] [CK_INV:3]
  • D=[D:1154] [D_INV:15]
  • FFX_INIT_ATTR=[INIT0:1057] [INIT1:112]
  • FFX_SR_ATTR=[SRLOW:1064] [SRHIGH:105]
  • LATCH_OR_FF=[FF:1169]
  • REV=[REV_INV:0] [REV:68]
  • SR=[SR:708] [SR_INV:16]
  • SYNC_ATTR=[ASYNC:1056] [SYNC:113]
SLICEL_FFY
  • CE=[CE:816] [CE_INV:33]
  • CK=[CK:927] [CK_INV:10]
  • D=[D:908] [D_INV:29]
  • FFY_INIT_ATTR=[INIT0:886] [INIT1:51]
  • FFY_SR_ATTR=[SRLOW:889] [SRHIGH:48]
  • LATCH_OR_FF=[FF:937]
  • REV=[REV_INV:0] [REV:8]
  • SR=[SR:509] [SR_INV:20]
  • SYNC_ATTR=[ASYNC:814] [SYNC:123]
SLICEL_XORF
  • 1=[1_INV:3] [1:430]
SLICEM
  • BX=[BX_INV:0] [BX:38]
  • BY=[BY:110] [BY_INV:0]
  • CE=[CE:46] [CE_INV:0]
  • CLK=[CLK:78] [CLK_INV:0]
  • SR=[SR:78] [SR_INV:0]
SLICEM_F
  • DI=[DI:70] [DI_INV:0]
  • F_ATTR=[DUAL_PORT:64] [SHIFT_REG:6]
  • LUT_OR_MEM=[LUT:32] [RAM:70]
SLICEM_F5MUX
  • S0=[S0:32] [S0_INV:0]
SLICEM_F6MUX
  • S0=[S0:32] [S0_INV:0]
SLICEM_FFX
  • CE=[CE:6] [CE_INV:0]
  • CK=[CK:6] [CK_INV:0]
  • D=[D:6] [D_INV:0]
  • FFX_INIT_ATTR=[INIT0:6]
  • FFX_SR_ATTR=[SRLOW:6]
  • LATCH_OR_FF=[FF:6]
  • SYNC_ATTR=[ASYNC:6]
SLICEM_FFY
  • CE=[CE:46] [CE_INV:0]
  • CK=[CK:46] [CK_INV:0]
  • D=[D:46] [D_INV:0]
  • FFY_INIT_ATTR=[INIT0:46]
  • FFY_SR_ATTR=[SRLOW:46]
  • LATCH_OR_FF=[FF:46]
  • SYNC_ATTR=[ASYNC:46]
SLICEM_G
  • DI=[DI:78] [DI_INV:0]
  • G_ATTR=[DUAL_PORT:64] [SHIFT_REG:14]
  • LUT_OR_MEM=[LUT:32] [RAM:78]
SLICEM_WSGEN
  • CK=[CK:78] [CK_INV:0]
  • SYNC_ATTR=[ASYNC:46]
  • WE=[WE_INV:0] [WE:78]
 
Pin Data
BUFGMUX
  • I0=7
  • O=7
  • S=7
BUFGMUX_GCLKMUX
  • I0=7
  • OUT=7
  • S=7
BUFGMUX_GCLK_BUFFER
  • IN=7
  • OUT=7
DCM
  • CLK0=2
  • CLKDV=1
  • CLKFB=2
  • CLKFX=1
  • CLKIN=2
  • LOCKED=1
  • PSCLK=2
  • PSEN=2
  • PSINCDEC=2
  • RST=2
  • STATUS2=1
DCM_DCM
  • CLK0=2
  • CLKDV=1
  • CLKFB=2
  • CLKFX=1
  • CLKIN=2
  • LOCKED=1
  • PSCLK=2
  • PSEN=2
  • PSINCDEC=2
  • RST=2
  • STATUS2=1
IBUF
  • I=41
  • ICE=8
  • ICLK1=9
  • IQ1=9
  • PAD=49
IBUF_DELAY_ADJ_BBOX
  • IBUF_OUT=41
  • IFD_OUT=9
  • SEL_IN=49
IBUF_IFF1
  • CE=8
  • CK=9
  • D=9
  • Q=9
IBUF_INBUF
  • IN=49
  • OUT=49
IBUF_PAD
  • PAD=49
IOB
  • O1=37
  • PAD=37
IOB_OUTBUF
  • IN=37
  • OUT=37
IOB_PAD
  • PAD=37
MULT18X18SIO
  • A0=2
  • A1=2
  • A10=2
  • A11=2
  • A12=2
  • A13=2
  • A14=2
  • A15=2
  • A16=2
  • A17=2
  • A2=2
  • A3=2
  • A4=2
  • A5=2
  • A6=2
  • A7=2
  • A8=2
  • A9=2
  • B0=2
  • B1=2
  • B10=2
  • B11=2
  • B12=2
  • B13=2
  • B14=2
  • B15=2
  • B16=2
  • B17=2
  • B2=2
  • B3=2
  • B4=2
  • B5=2
  • B6=2
  • B7=2
  • B8=2
  • B9=2
  • CEA=2
  • CEB=2
  • CEP=2
  • CLK=2
  • P16=2
  • P17=2
  • P18=2
  • P19=2
  • P20=2
  • P21=2
  • P22=2
  • P23=2
  • P24=2
  • P25=2
  • P26=2
  • P27=2
  • P28=2
  • P29=2
  • P30=2
  • P31=2
  • P32=2
  • P33=2
  • RSTA=2
  • RSTB=2
  • RSTP=2
MULT18X18SIO_MULT18X18SIO
  • A0=2
  • A1=2
  • A10=2
  • A11=2
  • A12=2
  • A13=2
  • A14=2
  • A15=2
  • A16=2
  • A17=2
  • A2=2
  • A3=2
  • A4=2
  • A5=2
  • A6=2
  • A7=2
  • A8=2
  • A9=2
  • B0=2
  • B1=2
  • B10=2
  • B11=2
  • B12=2
  • B13=2
  • B14=2
  • B15=2
  • B16=2
  • B17=2
  • B2=2
  • B3=2
  • B4=2
  • B5=2
  • B6=2
  • B7=2
  • B8=2
  • B9=2
  • CEA=2
  • CEB=2
  • CEP=2
  • CLK=2
  • P16=2
  • P17=2
  • P18=2
  • P19=2
  • P20=2
  • P21=2
  • P22=2
  • P23=2
  • P24=2
  • P25=2
  • P26=2
  • P27=2
  • P28=2
  • P29=2
  • P30=2
  • P31=2
  • P32=2
  • P33=2
  • RSTA=2
  • RSTB=2
  • RSTP=2
RAMB16BWE
  • ADDRA10=19
  • ADDRA11=19
  • ADDRA12=19
  • ADDRA13=19
  • ADDRA2=8
  • ADDRA3=18
  • ADDRA4=19
  • ADDRA5=19
  • ADDRA6=19
  • ADDRA7=19
  • ADDRA8=19
  • ADDRA9=19
  • ADDRB10=2
  • ADDRB11=2
  • ADDRB12=2
  • ADDRB13=2
  • ADDRB3=1
  • ADDRB4=2
  • ADDRB5=2
  • ADDRB6=2
  • ADDRB7=2
  • ADDRB8=2
  • ADDRB9=2
  • CLKA=19
  • CLKB=2
  • DIA0=6
  • DIA1=6
  • DIA10=1
  • DIA11=1
  • DIA12=1
  • DIA13=1
  • DIA14=1
  • DIA15=1
  • DIA2=6
  • DIA3=6
  • DIA4=6
  • DIA5=6
  • DIA6=6
  • DIA7=6
  • DIA8=1
  • DIA9=1
  • DIPA0=6
  • DIPA1=1
  • DOA0=17
  • DOA1=17
  • DOA2=17
  • DOA3=17
  • DOA4=9
  • DOA5=9
  • DOA6=9
  • DOA7=9
  • DOB0=2
  • DOB1=2
  • DOB10=1
  • DOB11=1
  • DOB2=2
  • DOB3=2
  • DOB4=2
  • DOB5=1
  • DOB6=1
  • DOB7=1
  • DOB8=1
  • DOB9=1
  • ENA=19
  • ENB=2
  • SSRA=19
  • SSRB=2
  • WEA0=19
  • WEA1=19
  • WEA2=19
  • WEA3=19
  • WEB0=19
  • WEB1=19
  • WEB2=19
  • WEB3=19
RAMB16BWE_RAMB16BWE
  • ADDRA10=19
  • ADDRA11=19
  • ADDRA12=19
  • ADDRA13=19
  • ADDRA2=8
  • ADDRA3=18
  • ADDRA4=19
  • ADDRA5=19
  • ADDRA6=19
  • ADDRA7=19
  • ADDRA8=19
  • ADDRA9=19
  • ADDRB10=2
  • ADDRB11=2
  • ADDRB12=2
  • ADDRB13=2
  • ADDRB3=1
  • ADDRB4=2
  • ADDRB5=2
  • ADDRB6=2
  • ADDRB7=2
  • ADDRB8=2
  • ADDRB9=2
  • CLKA=19
  • CLKB=2
  • DIA0=6
  • DIA1=6
  • DIA10=1
  • DIA11=1
  • DIA12=1
  • DIA13=1
  • DIA14=1
  • DIA15=1
  • DIA2=6
  • DIA3=6
  • DIA4=6
  • DIA5=6
  • DIA6=6
  • DIA7=6
  • DIA8=1
  • DIA9=1
  • DIPA0=6
  • DIPA1=1
  • DOA0=17
  • DOA1=17
  • DOA2=17
  • DOA3=17
  • DOA4=9
  • DOA5=9
  • DOA6=9
  • DOA7=9
  • DOB0=2
  • DOB1=2
  • DOB10=1
  • DOB11=1
  • DOB2=2
  • DOB3=2
  • DOB4=2
  • DOB5=1
  • DOB6=1
  • DOB7=1
  • DOB8=1
  • DOB9=1
  • ENA=19
  • ENB=2
  • SSRA=19
  • SSRB=2
  • WEA0=19
  • WEA1=19
  • WEA2=19
  • WEA3=19
  • WEB0=19
  • WEB1=19
  • WEB2=19
  • WEB3=19
SLICEL
  • BX=961
  • BY=480
  • CE=1186
  • CIN=451
  • CLK=1350
  • COUT=463
  • F1=3181
  • F2=2906
  • F3=2481
  • F4=1710
  • F5=36
  • FX=16
  • FXINA=18
  • FXINB=18
  • G1=3085
  • G2=2809
  • G3=2305
  • G4=1549
  • SR=826
  • X=2305
  • XB=7
  • XQ=1169
  • Y=1998
  • YQ=937
SLICEL_C1VDD
  • 1=120
SLICEL_C2VDD
  • 1=111
SLICEL_CYMUXF
  • 0=511
  • 1=511
  • OUT=511
  • S0=511
SLICEL_CYMUXG
  • 0=460
  • 1=463
  • OUT=463
  • S0=463
SLICEL_F
  • A1=3178
  • A2=2906
  • A3=2481
  • A4=1710
  • D=3188
SLICEL_F5MUX
  • F=513
  • G=513
  • OUT=513
  • S0=513
SLICEL_F6MUX
  • 0=18
  • 1=18
  • OUT=18
  • S0=18
SLICEL_FFX
  • CE=1024
  • CK=1169
  • D=1169
  • Q=1169
  • REV=68
  • SR=724
SLICEL_FFY
  • CE=849
  • CK=937
  • D=937
  • Q=937
  • REV=8
  • SR=529
SLICEL_G
  • A1=3082
  • A2=2809
  • A3=2305
  • A4=1549
  • D=3102
SLICEL_GNDF
  • 0=218
SLICEL_GNDG
  • 0=188
SLICEL_VDDG
  • 1=3
SLICEL_XORF
  • 0=433
  • 1=433
  • O=433
SLICEL_XORG
  • 0=418
  • 1=418
  • O=418
SLICEM
  • BX=38
  • BY=110
  • CE=46
  • CLK=78
  • F1=102
  • F2=102
  • F3=102
  • F4=80
  • F5=32
  • FX=16
  • FXINA=32
  • FXINB=32
  • G1=110
  • G2=110
  • G3=110
  • G4=100
  • SR=78
  • X=64
  • XQ=6
  • Y=48
  • YQ=46
SLICEM_F
  • A1=102
  • A2=102
  • A3=102
  • A4=80
  • D=102
  • DI=70
  • WF1=64
  • WF2=64
  • WF3=64
  • WF4=64
  • WS=70
SLICEM_F5MUX
  • F=32
  • G=32
  • OUT=32
  • S0=32
SLICEM_F6MUX
  • 0=32
  • 1=32
  • OUT=32
  • S0=32
SLICEM_FFX
  • CE=6
  • CK=6
  • D=6
  • Q=6
SLICEM_FFY
  • CE=46
  • CK=46
  • D=46
  • Q=46
SLICEM_G
  • A1=110
  • A2=110
  • A3=110
  • A4=100
  • D=78
  • DI=78
  • WG1=64
  • WG2=64
  • WG3=64
  • WG4=64
  • WS=78
SLICEM_WSGEN
  • CK=78
  • WE=78
  • WSF=70
  • WSG=78
 
Software Quality
Run Statistics
Bitgen 12869 12868 0 0 0 0 0
MAP 7020 6822 0 0 0 0 0
NGDBuild 7337 7321 0 0 0 0 0
PAR 6814 6462 322 0 0 0 0
Start 0 0 0 0 0 0 0
_impact 245 241 0 0 0 0 0
bitgen 1 1 0 0 0 0 0
edif2ngd 74422 74418 0 0 0 0 0
map 14 2 0 0 0 0 0
ngc2edif 140 140 0 0 0 0 0
ngcbuild 117 117 0 0 0 0 0
ngdbuild 17 16 0 0 0 0 0
par 2 2 0 0 0 0 0
trce 6468 6464 0 0 0 0 0
xst 7087 6984 0 0 0 0 0
 
Unisim Statistics
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_AND3=1 NGDBUILD_NUM_BUF=14 NGDBUILD_NUM_BUFG=5 NGDBUILD_NUM_BUFGP=2
NGDBUILD_NUM_DCM=1 NGDBUILD_NUM_DCM_SP=1 NGDBUILD_NUM_FD=25 NGDBUILD_NUM_FDC=28
NGDBUILD_NUM_FDCE=703 NGDBUILD_NUM_FDCPE=12 NGDBUILD_NUM_FDE=610 NGDBUILD_NUM_FDP=2
NGDBUILD_NUM_FDPE=128 NGDBUILD_NUM_FDR=3 NGDBUILD_NUM_FDRE=209 NGDBUILD_NUM_FDR_1=4
NGDBUILD_NUM_FDS=11 NGDBUILD_NUM_FDSE=9 NGDBUILD_NUM_GND=36 NGDBUILD_NUM_IBUF=28
NGDBUILD_NUM_IBUFG=1 NGDBUILD_NUM_INV=261 NGDBUILD_NUM_LUT1=239 NGDBUILD_NUM_LUT2=653
NGDBUILD_NUM_LUT2_D=43 NGDBUILD_NUM_LUT2_L=26 NGDBUILD_NUM_LUT3=1341 NGDBUILD_NUM_LUT3_D=95
NGDBUILD_NUM_LUT3_L=53 NGDBUILD_NUM_LUT4=2775 NGDBUILD_NUM_LUT4_D=142 NGDBUILD_NUM_LUT4_L=290
NGDBUILD_NUM_MULT18X18SIO=2 NGDBUILD_NUM_MUXCY=818 NGDBUILD_NUM_MUXF5=542 NGDBUILD_NUM_MUXF6=34
NGDBUILD_NUM_MUXF7=16 NGDBUILD_NUM_OBUF=37 NGDBUILD_NUM_RAM16X1D=64 NGDBUILD_NUM_RAMB16BWE=19
NGDBUILD_NUM_SRLC16E=20 NGDBUILD_NUM_VCC=22 NGDBUILD_NUM_XORCY=717
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_AND3=1 NGDBUILD_NUM_BUF=14 NGDBUILD_NUM_BUFG=7 NGDBUILD_NUM_DCM_SP=2
NGDBUILD_NUM_FD=101 NGDBUILD_NUM_FDC=38 NGDBUILD_NUM_FDCE=767 NGDBUILD_NUM_FDCE_1=3
NGDBUILD_NUM_FDCP=64 NGDBUILD_NUM_FDCPE=12 NGDBUILD_NUM_FDC_1=5 NGDBUILD_NUM_FDE=804
NGDBUILD_NUM_FDP=8 NGDBUILD_NUM_FDPE=128 NGDBUILD_NUM_FDPE_1=1 NGDBUILD_NUM_FDR=3
NGDBUILD_NUM_FDRE=209 NGDBUILD_NUM_FDR_1=4 NGDBUILD_NUM_FDS=11 NGDBUILD_NUM_FDSE=9
NGDBUILD_NUM_GND=41 NGDBUILD_NUM_IBUF=46 NGDBUILD_NUM_IBUFG=3 NGDBUILD_NUM_INV=268
NGDBUILD_NUM_LUT1=239 NGDBUILD_NUM_LUT1_L=74 NGDBUILD_NUM_LUT2=795 NGDBUILD_NUM_LUT2_D=43
NGDBUILD_NUM_LUT2_L=74 NGDBUILD_NUM_LUT3=1352 NGDBUILD_NUM_LUT3_D=95 NGDBUILD_NUM_LUT3_L=194
NGDBUILD_NUM_LUT4=2808 NGDBUILD_NUM_LUT4_D=142 NGDBUILD_NUM_LUT4_L=299 NGDBUILD_NUM_MULT18X18SIO=2
NGDBUILD_NUM_MUXCY=821 NGDBUILD_NUM_MUXCY_L=150 NGDBUILD_NUM_MUXF5=545 NGDBUILD_NUM_MUXF6=34
NGDBUILD_NUM_MUXF7=16 NGDBUILD_NUM_OBUF=37 NGDBUILD_NUM_PULLUP=1 NGDBUILD_NUM_RAMB16BWE=19
NGDBUILD_NUM_SRLC16E=20 NGDBUILD_NUM_VCC=24 NGDBUILD_NUM_XORCY=851